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ADC Control Register

0x06

Bits Type Default Description

[15] WO 0 Input multiplexor settling delay:

0 – no delay;

1 – 12 µs delay.

[14:5] WO 0x000 ADC conversion control. A 1 enables conversion of the

corresponding channel:

[14] – enable conversion on reference 1 (0 V);

[13] – enable conversion on reference 0 (+10 V);

[12] – enable conversion of channel 7;

[11] – enable conversion of channel 6;

[10] – enable conversion of channel 5;

[9] – enable conversion of channel 4;

[8] – enable conversion of channel 3;

[7] – enable conversion of channel 2;

[6] – enable conversion of channel 1;

[5] – enable conversion of channel 0.

[4:1] WO 0000 ADC read channel select:

0000 - channel 0;

0001 - channel 1;

0010 - channel 2;

0011 - channel 3;

0100 - channel 4;

0101 - channel 5;

0110 - channel 6;

0111 - channel 7;

1000 - reference 0 (+10 V);

1001 - reference 1 (0 V).

[0] WO 0 ADC start. Writing a 1 to this bit starts conversion on channels

selected with bits [14:5] (Note 1). Bit [2] of the Interrupt

Status register is set to 1 when upload is complete.

Notes:

1. Selection of channels and ADC start can be performed in one access to the ADC Control

DAC/ADC Data Register

0x08

Bits Type Default Description

[15:0] RW 0x0000 Write operation: data to be written to DAC preload register for

the channel selected in DAC control register.

Read operation: conversion result from ADC channel selected in

ADC control register.

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