PCI Express Multifunction I/O BoardInstruction ManualModel 826 | Rev.3.0.5 | November 2013
Chapter 3: ProgrammingA software developers kit (SDK) for Model 826 is available for download from Sensoray's web site. The SDK includes Linux an
3.3 Error CodesMost of the API functions return an error code. These functions return zero if no errors are detected, otherwise a negative value will
Return ValuesThe return value is always zero.RemarksThis function should be called when a process (e.g., an application program) has finished interact
Parametersboard826 board number. This must match the settings of the board's dip switches as described in section 2.2.timestampPointer to buffer
Chapter 4: Virtual Outputs4.1 IntroductionThe board has six virtual digital output channels, numbered 0 to 5, that can be used by software to signal v
int S826_VirtualWrite( uint board, // board identifier uint data, // data to write uint mode // 0=write, 1=clear bits, 2=set bits);P
int S826_VirtualSafeWrite( uint board, // board identifier uint data, // safemode data uint mode // 0=write, 1=clear bits, 2=set bit
enablesPointer to array of values (see Section 4.2) to be programmed into the Safe Enable registers.Return ValuesIf the function succeeds, the return
Chapter 5: Analog Inputs5.1 IntroductionThe board's analog input system consists of the following major elements:• Analog multiplexer (Mux) - sel
ADC conversions are disabled upon board reset. Typically, an application program will configure the ADC system (by programming slotlist and slot confi
5.2 Connector J1All analog input and output signals are available at connector J1.J1 PinoutPin Name Function Pin Name Function1 GNDPower supply common
chanAnalog input channel number in the range 0 to 15.tsettleMicroseconds to allow the analog input to settle before conversion, in the range 0 to 335,
chanBuffer that will receive the analog input channel number.tsettleBuffer that will receive the analog settling time in microseconds.rangeBuffer that
int S826_AdcSlotlistRead( uint board, // board identifier uint *slotlist // conversion slot list);Parametersboard826 board number. This mus
5.3.6 S826_AdcTrigModeReadThe S826_AdcTrigModeRead function reads the ADC triggering mode.int S826_AdcTrigModeRead( uint board, // board identif
int S826_AdcEnableRead( uint board, // board identifier uint *enable // enable status);Parametersboard826 board number. This must match the set
Parametersboard826 board number. This must match the settings of the board's dip switches as described in section 2.2.bufPointer to a buffer that
The function will operate in either blocking or non-blocking mode depending on the value of tmax. If tmax is zero, the function will return immediatel
Chapter 6: Analog Outputs6.1 IntroductionThe 826 board has eight 16-bit, single-ended digital-to-analog converter (DAC) channels. Each channel can be
6.1.2 Reset StateUpon reset, all DAC outputs and all channels in both RAM banks are programmed to 0V with the output range set to 0 to +5V.6.2 Connect
Table of ContentsChapter 1: Preliminary... 11.1 Limited Warranty...
6.3.2 S826_DacDataWriteThe S826_DacDataWrite function programs the output voltage of a DAC channel.int S826_DacDataWrite( uint board, // board id
Parametersboard826 board number. This must match the settings of the board's dip switches as described in section 2.2.chanDAC channel number in t
Chapter 7: Counters7.1 IntroductionThe model 826 board has six identical 32-bit programmable counter channels, numbered 0 to 5. Each counter channel c
The ClkA, ClkB, and IX inputs employ differential RS-422 line receivers for buffering and noise immunity. All line receivers have built-in termination
7.1.5 SnapshotsA “snapshot” consists of three values that are simultaneously sampled in response to a trigger: the counts contained in the counter cor
Preload BehaviorMode RegisterBP bitPreload Trigger TypeCounter CoreLoads FromActivatedAfter Preload0 Any Preload0 Preload01Zero Counts Reached Active
7.2 Connectors J4/J5Two 26-pin headers, J4 and J5, bring out connections from the board's six counter channels to external field wiring. J4 is us
External signal connections to a counter channelFunctionPinNameSignalTypeClock SourceQuadrature Single-phase InternalClkAA+RS-422 ClockA+ Clock+ NCTTL
int S826_CounterSnapshotRead( uint board, // board identifier uint chan, // channel number uint *counts, // pointer to counts buffer ui
Quadrature-encoded clocks are monitored for encoding errors as described in Quadrature Decoder. When an encoding error is detected, a snapshot is capt
7.3.14 S826_CounterSnapshotConfigWrite...407.3.15 S826_CounterSnapshotConfigRead...417.3.16 S826_CounterFilterWrite...
chanCounter channel number in the range 0 to 5.regidSelects Compare register: 1 = Compare1 register, 0 = Compare0 register.countsValue to be written t
If the function fails, the return value is an error code.RemarksThis function forces a snapshot to be captured immediately. It is typically used to ca
Return ValuesIf the function succeeds, the return value is zero.If the function fails, the return value is an error code.RemarksThe counts value is im
Return ValuesIf the function succeeds, the return value is zero.If the function fails, the return value is an error code.RemarksIf sticky is false, th
The mode, preload, compare, and snapshot configuration registers are not affected when a channel transitions between halted and running states. This f
routeSignal to be connected to ExtIn (this is ignored if mode register field IM=0): 0 to 47 = DIO channel 0 to 47; 48 to 53 = counter channel 0 to 5
cfgFlags with 'E' prefix determine the types of events that will capture snapshots: '1' = enable capturing, '0' = disabl
If the function fails, the return value is an error code.7.3.16 S826_CounterFilterWriteThe S826_CounterFilterWrite function configures the IX, CLKA, a
chanCounter channel number in the range 0 to 5.cfgPointer to buffer that will receive the configuration. The format of the returned value is identical
NR Preload permissive. Typically used for “one-shot” pulse generator applications.0Allow preloading any time. This can be used for applications such
XS Index source.0 External IX input, normal polarity.1 External IX input, inverted.2-7 ExtOut from counter channel 0-5 (e.g., 3 = ExtOut from channel
Register ValueMode 0x00000000Preload0 0x00000000Periodic TimerPeriodically capture snapshots.Register ValueMode 0x00402020Snapshot Configuration 0x000
Register ValueMode 0x00008020Snapshot Configuration 0x00000009Preload0 0x00000000Pulse GeneratorGenerate an output pulse on ExtOut in response to a tr
Chapter 8: Digital I/O8.1 IntroductionThe 826 board has 48 general-purpose digital I/O (DIO) channels. On the output side, each channel has a one-bit,
The channel's DIO_out signal router consists of a data selector that can route either the DIO output register or an alternate source to the I/O p
8.1.4.1 Noise FilterEach DIO channel input circuit includes a noise filter that can be used to filter glitches (see S826_DioFilterWrite). A filter&apo
Although the DIO functions read or write values for all 48 DIO channels, the physical read or write operation is performed in steps; channels 0 to 23
RemarksThis function returns the output register states. Note that the returned values may not be the same as the physical I/O pin states in the case
Return ValuesIf the function succeeds, the return value is zero.If the function fails, the return value is an error code.RemarksThis function should o
int S826_DioSafeEnablesRead( uint board, // board identifier uint enables[2] // pointer to data buffer);Parametersboard826 board number. This
Chapter 1: Preliminary1.1 Limited WarrantySensoray Company, Incorporated (Sensoray) warrants the Model 826 hardware to be free from defects in materia
8.3.9 S826_DioCapEnablesReadThe S826_DioCapEnablesRead function returns the programmed edge sensitivity for DIO edge capturing.int S826_DioCapEnablesR
If the function fails, the return value is an error code.RemarksThis function waits for edge events to be captured on an arbitrary set of DIO channels
RemarksThis function cancels blocking for an arbitrary set of DIO channels so that another thread, which is blocked by S826_DioCapRead while waiting f
Symbol Signal SourceC0 Counter 0 ExtOutC1 Counter 1 ExtOutC2 Counter 2 ExtOutC3 Counter 3 ExtOutC4 Counter 4 ExtOutC5 Counter 5 ExtOutRST Watchdog RST
enablesPointer to a buffer (see Section 8.3) that specifies filter enables for the DIO channels: '1'=enable, '0'=disable.Return Va
Chapter 9: Watchdog Timer9.1 IntroductionThe model 826 board has a multistage watchdog timer that can activate the board's safemode system and ge
determines the pulse duration and PGAP determines the gap time between pulses. The RST signal is not internally connected to the host computer's
Quadlet Register Functiontiming[0] DELAY0 Timer0 interval. The program must kick the watchdog within this interval to prevent a watchdog timeout. This
Parametersboard826 board number. This must match the settings of the board's dip switches as described in section 2.2.enableSet to '1'
Flag FunctionTO2 Timer2 timeoutTO1 Timer1 timeoutTO0 Timer0 timeoutReturn ValuesIf the function succeeds, the return value is zero.If the function fai
Chapter 2: Introduction2.1 OverviewModel 826 is a PCI Express board that features an assortment of I/O interfaces commonly used in measurement and con
RemarksThis function can operate in either blocking or non-blocking mode. If tmax is zero, the function will return immediately. If tmax is greater th
Chapter 10: Safemode Controller10.1 IntroductionThe 826 board features a fail-safe controller that forces analog and digital outputs to predetermined
These API functions write to SWE protected registers:• S826_DacRangeWrite and S826_DacDataWrite (when safemode argument = '1')• S826_DioOutp
int S826_SafeControlRead( uint board, // board identifier uint *settings // safemode settings);Parametersboard826 board number. This must match
wrenPointer to buffer that will receive the write protection status: 0 = write protected, 2 = write enabled.Return ValuesIf the function succeeds, the
Chapter 11: SpecificationsDigital I/OChannels Number/type 48 bi-directionalSignal levels 5 V TTL/CMOSSampling rate 50 Ms/sOutput Driver type Open drai
Watchdog TimerTimer stages Number 3Interval (per stage) Programmable from 1 to 232-1 * 20 ns (20 ns to ~85.9 s)Output events Stage 0: Fail-safe trigge
2.1.1 Timestamp GeneratorA timestamp generator is shared by the analog input system and counter channels. The timestamp generator is a free-running 32
2.3 Board Layout2.4 Cable InstallationThe 826 board should be connected to external circuitry with Sensoray cables, model 826C1 (26 conductor, for cou
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